MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 394

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DDR Memory Controller
9-70
ODT_WR_CFG
ODT_PD_EXIT
PRETOACT
ACTTOPRE
ACTTOACT
ACTTORW
Parameter
REFREC
CASLAT
WRREC
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Table 9-54. Programming Differences Between Memory Types (continued)
Chip Select ODT Write
Configuration
ODT Powerdown Exit
Precharge to Activate
Timing
Activate to Precharge
Timing
Activate to Read/Write
Timing
CAS Latency
Refresh Recovery
Write Recovery
Activate A to Activate B
Description
DDR1
DDR2
DDR2
DDR1
DDR2
DDR1
DDR2
DDR1
DDR2
DDR2
DDR2
DDR2
DDR1
DDR2
DDR1
DDR1
DDR1
DDR1
Should always be set to 000
could be set differently depending on system
topology. However, ODT will typically be set to
assert for the chip select that is getting written to
(value would be set to 001).
Should be set according to the DDR2
specifications for the memory used. The JEDEC
parameter this applies to is t
the memory used (t
the memory used (t
Should be set, along with the Extended Activate to
Precharge Timing, according to the specifications
for the memory used (t
Should be set, along with the Extended Activate to
Precharge Timing, according to the specifications
for the memory used (t
the memory used (t
the memory used (t
Latency, to the desired CAS latency
Should be set, along with the Extended CAS
Latency, to the desired CAS latency
Recovery, to the specifications for the memory
used (t
Recovery, to the specifications for the memory
used (T
the memory used (t
the memory used (t
the memory used (t
the memory used (t
Can be enabled to assert ODT if desired. This
Should be set to 0000
Should be set according to the specifications for
Should be set according to the specifications for
Should be set according to the specifications for
Should be set according to the specifications for
Should be set, along with the Extended CAS
Should be set, along with the Extended Refresh
Should be set, along with the Extended Refresh
Should be set according to the specifications for
Should be set according to the specifications for
Should be set according to the specifications for
Should be set according to the specifications for
RFC
RFC
)
)
Differences
RP
RP
RCD
RCD
WR
WR
RRD
RRD
)
)
)
)
RAS
RAS
)
)
)
)
)
)
AXPD
.
Freescale Semiconductor
Section/page
9.4.1.2/9-11
9.4.1.4/9-14
9.4.1.5/9-16
9.4.1.5/9-16
9.4.1.5/9-16
9.4.1.5/9-16
9.4.1.5/9-16
9.4.1.5/9-16
9.4.1.5/9-16