MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 41

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Paragraph
Number
18.4.3
18.4.4
18.4.4.1
18.4.5
18.5
18.5.1
19.1
19.2
19.2.1
19.2.2
19.2.3
19.2.4
19.3
19.3.1
19.3.2
19.4
19.4.1
19.4.1.1
19.4.1.2
19.4.1.3
19.4.1.4
19.4.1.5
19.4.1.6
19.4.1.7
19.4.1.8
19.4.1.9
19.4.1.10
19.4.1.11
19.4.1.12
19.4.1.13
19.4.1.14
19.4.1.15
19.4.1.16
19.4.1.17
Freescale Semiconductor
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Initialization/Application Information ....................................................................... 18-109
Overview........................................................................................................................ 19-1
Global Utilities Features ................................................................................................ 19-1
External Signal Description ........................................................................................... 19-2
Memory Map/Register Definition ................................................................................. 19-3
Initial Credit Advertisement .................................................................................. 18-107
Power Management ............................................................................................... 18-108
Hot Reset................................................................................................................ 18-109
Boot Mode and Inbound Configuration Transactions ........................................... 18-109
Power Management and Block Disables ................................................................... 19-1
Accessing Current POR Configuration Settings........................................................ 19-1
Interrupt and Local Bus Signal Multiplexing ............................................................ 19-1
Clock Control............................................................................................................. 19-1
Signals Overview....................................................................................................... 19-2
Detailed Signal Descriptions ..................................................................................... 19-2
Register Descriptions................................................................................................. 19-4
L2/L3 Ready Link State..................................................................................... 18-108
POR PLL Status Register (PORPLLSR) ............................................................... 19-4
POR Boot Mode Status Register (PORBMSR)..................................................... 19-6
POR I/O Impedance Status and Control Register (PORIMPSCR) ....................... 19-7
POR Device Status Register (PORDEVSR).......................................................... 19-8
POR Debug Mode Status Register (PORDBGMSR) .......................................... 19-10
POR Device Status Register 2 (PORDEVSR2)................................................... 19-10
General-Purpose POR Configuration Register (GPPORCR) .............................. 19-11
General-Purpose I/O Control Register (GPIOCR) .............................................. 19-11
General-Purpose Output Data Register (GPOUTDR) ......................................... 19-12
General-Purpose Input Data Register (GPINDR)................................................ 19-13
Alternate Function Signal Multiplex Control Register (PMUXCR) ................... 19-13
Device Disable Register (DEVDISR) ................................................................. 19-14
Power Management Control and Status Register (POWMGTCSR).................... 19-16
Machine Check Summary Register (MCPSUMR).............................................. 19-17
Reset Request Status and Control Register (RSTRSCR) .................................... 19-18
Processor Version Register (PVR)....................................................................... 19-18
System Version Register (SVR)........................................................................... 19-19
Global Functions and Debug
Global Utilities
Contents
Chapter 19
Part IV
Title
Number
Page
xli

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