MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 445

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.3.8.3
The processor who am I register (WHOAMI), shown in
determine its physical connection to the PIC. The value returned when reading this register may be used
to determine the value for the destination masks used for dispatching interrupts.
Table 10-49
10.3.8.4
In systems based on processors that implement the Power Architecture technology, the interrupt
acknowledge function occurs as an explicit read operation to a memory-mapped interrupt acknowledge
register (IACK), shown in
vector corresponding to the highest priority pending interrupt. Reading IACK also has the following side
effects:
Reading this register when there is no pending interrupt returns the spurious vector value as described in
Section 10.3.1.8, “Spurious Vector Register (SVR).”
Freescale Semiconductor
27–31
0–26
Offset 0x6_0090
Offset 0x6_00A0
Reset
Bits
Reset
W
W
R
R
The associated field in the interrupt pending register is cleared for edge-sensitive interrupts.
The in-service register (ISR) is updated.
The interrupt signal (int) to the processor is negated.
0
0
Name
ID
describes the WHOAMI fields.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Who Am I Register (WHOAMI)
Processor Interrupt Acknowledge Register (IACK)
Reserved
Returns the ID of the processor reading this register. Always returns zero.
Figure 10-46. Processor Interrupt Acknowledge Register (IACK)
Figure 10-45. Processor Who Am I Register (WHOAMI)
Figure
Table 10-49. WHOAMI Field Descriptions
10-46. Reading the interrupt acknowledge register returns the interrupt
All zeros
All zeros
15 16
Description
Figure
10-45, can be read by the processor to
VECTOR
Programmable Interrupt Controller
26 27
Access: Read Only
Access: Read only
ID
10-47
31
31

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