R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 948

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 Serial Communication Interface (SCI, IrDA, CRC)
Rev. 2.00 Oct. 21, 2009 Page 914 of 1454
REJ09B0498-0200
and clear TDRE flag in SSR to 0
Write transmit data to TDR
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
Figure 19.10 Example of Serial Transmission Flowchart
All data transmitted?
Clear DR to 0 and
Start transmission
set DDR to 1
Break output
Initialization
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[4]
[1] SCI initialization:
[2] SCI state check and transmit data
[3] Serial transmission continuation
[4] Break output at the end of serial
The TxD pin is automatically
designated as the transmit data
output pin. After the TE bit is set to
1, a 1 is output for a frame, and
transmission is enabled.
write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR and clear the
TDRE flag to 0.
procedure:
To continue serial transmission,
read 1 from the TDRE flag to
confirm that writing is possible,
then write data to TDR, and clear
the TDRE flag to 0. However, the
TDRE flag is checked and cleared
automatically when the DMAC or
DTC is initiated by a transmit data
empty interrupt (TXI) request and
writes data to TDR.
transmission:
To output a break in serial
transmission, set DDR for the port
corresponding to the TxD pin to 1,
clear DR to 0, then clear the TE bit
in SCR to 0.