R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 831

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
15.4.5
Figures 15.10 and 15.11 show a sample procedure for setting up non-overlapping pulse output.
• Sample Setup Procedure for PPG0
PPG0 setup
TPU0 setup
TPU0 setup
Figure 15.10 Setup Procedure for Non-Overlapping Pulse Output (PPG0)
Sample Setup Procedure for Non-Overlapping Pulse Output
Set non-overlapping groups
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Select output trigger
Enable pulse output
Compare match A?
Non-overlapping
Set TGR values
Set next pulse
Set next pulse
Start counter
pulse output
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
Section 15 Programmable Pulse Generator (PPG)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Set the CST bit in TSTR to 1 to start the
[11] At each TGIA interrupt, set the next
Set TIOR in TPU0 to make TGRA and
TGRB output compare registers (with
output disabled).
Set the pulse output trigger cycle in
TGRB and the non-overlapping margin
in TGRA.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1
and CCLR0.
Enable the TGIA interrupt in TIER. The
DTC or DMAC can also be set up to
transfer data to NDR.
Set the initial output values in PODR.
Set the bits in NDER for the pins to be
used for pulse output to 1.
Select the TPU compare match event to
be used as the pulse output trigger in
PCR.
In PMR, select the groups that will
operate in non-overlapping mode.
Set the next pulse output values in NDR.
TCNT counter.
output values in NDR.
Rev. 2.00 Oct. 21, 2009 Page 797 of 1454
REJ09B0498-0200

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