R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 431

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4
Table 10.4 shows the DMAC transfer modes. The transfer modes can be specified to the
individual channels.
Table 10.4 Transfer Modes
When the auto request setting is selected as the activation source, the cycle stealing or burst access
can be selected. When the total transfer size is not specified (DTCR = H'00000000), the transfer
counter is stopped and the transfer is continued without the limitation of the transfer count.
Address
Mode
Dual
address
Single
address
Transfer Modes
Transfer mode
•
•
•
Repeat or block size
= 1 to 65,536 bytes,
1 to 65,536 words, or
1 to 65,536
longwords
•
•
•
Normal transfer
Repeat transfer
Block transfer
Instead of specifying the source or destination address
registers, data is directly transferred from/to the external
device using the DACK pin
The same settings as above are available other than address
register setting (e.g., above transfer modes can be specified)
One transfer can be performed in one bus cycle (the types of
transfer modes are the same as those of dual address modes)
Activation Source
•
•
•
Auto request
(activated by
CPU)
On-chip module
interrupt
External request
Common Function
•
•
•
Total transfer
size: 1 to 4
Gbytes or not
specified
Offset addition
Extended repeat
area function
Rev. 2.00 Oct. 21, 2009 Page 397 of 1454
Section 10 DMA Controller (DMAC)
Address Register
Source
DSAR
DSAR/
DACK
REJ09B0498-0200
Destina-
tion
DDAR
DACK/
DDAR