R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 768

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 16-Bit Timer Pulse Unit (TPU)
(2)
(a)
Figure 14.16 shows an operation example in which PWM mode 1 has been designated for channel
0, and buffer operation has been designated for TGRA and TGRC. The settings used in this
example are TCNT clearing by compare match B, 1 output at compare match A, and 0 output at
compare match B.
As buffer operation has been set, when compare match A occurs, the output changes and the value
in buffer register TGRC is simultaneously transferred to timer general register TGRA. This
operation is repeated each time compare match A occurs.
For details on PWM modes, see section 14.4.5, PWM Modes.
Rev. 2.00 Oct. 21, 2009 Page 734 of 1454
REJ09B0498-0200
Examples of Buffer Operation
When TGR is an output compare register
TGRB_0
TGRA_0
H'0000
TGRC_0
TGRA_0
TIOCA
TCNT value
Transfer
H'0200
H'0200
Figure 14.16 Example of Buffer Operation (1)
H'0200
H'0450
H'0450
H'0450
H'0520
H'0520
Time

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