R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1343

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
I
I
Slave address register_1
I
I
Timer control register_2
Timer control register_3
Timer control/status register_2
Timer control/status register_3
Time constant register A_2
Time constant register A_3
Time constant register B_2
Time constant register B_3
Timer counter_2
Timer counter_3
Timer counter control register_2
Timer counter control register_3
Timer control register_4
Timer mode register_4
Timer I/O control register_4
Timer interrupt enable register_4
Timer status register_4
Timer counter_4
Timer general register A_4
Timer general register B_4
Timer control register_5
Timer mode register_5
Timer I/O control register_5
Timer interrupt enable register_5
Timer status register_5
Timer counter_5
2
2
2
2
C bus interrupt enable register_1
C bus status register_1
C bus transmit data register_1
C bus receive data register_1
Abbreviation
ICIER_1
ICSR_1
SAR_1
ICDRT_1
ICDRR_1
TCR_2
TCR_3
TCSR_2
TCSR_3
TCORA_2
TCORA_3
TCORB_2
TCORB_3
TCNT_2
TCNT_3
TCCR_2
TCCR_3
TCR_4
TMDR_4
TIOR_4
TIER_4
TSR_4
TCNT_4
TGRA_4
TGRB_4
TCR_5
TMDR_5
TIOR_5
TIER_5
TSR_5
TCNT_5
Number
of Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
8
8
8
8
8
16
Address
H'FFEBB
H'FFEBC
H'FFEBD
H'FFEC0
H'FFEC1
H'FFEC2
H'FFEC3
H'FFEC4
H'FFEC5
H'FFEC6
H'FFEC7
H'FFEC8
H'FFEC9
H'FFECA
H'FFECB
H'FFEE0
H'FFEE2
H'FFEE4
H'FFEE5
H'FFEE6
H'FFEE8
H'FFEEA
H'FFEF0
H'FFEF1
H'FFEF2
H'FFEF4
H'FFEF5
H'FFEF6
H'FFEBE
H'FFEBF
H'FFEE1
Rev. 2.00 Oct. 21, 2009 Page 1309 of 1454
Module
IIC2_1
IIC2_1
IIC2_1
IIC2_1
IIC2_1
TMR_2
TMR_3
TMR_2
TMR_3
TMR_2
TMR_3
TMR_2
TMR_3
TMR_2
TMR_3
TMR_2
TMR_3
TPU_4
TPU_4
TPU_4
TPU_4
TPU_4
TPU_4
TPU_4
TPU_4
TPU_5
TPU_5
TPU_5
TPU_5
TPU_5
TPU_5
Section 29 List of Registers
Data
Width
8
8
8
8
8
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
REJ09B0498-0200
Access
Cycles
(Read/Write)
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ
2Pφ/2Pφ