R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1095

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI includes two units (units 0 and 1) of successive approximation type 10-bit A/D
converter. The A/D converter unit 0 allows up to eight analog input channels to be selected while
the A/D converter unit 1 allows up to four analog input channels to be selected.
Figures 22.1 and 22.2 show block diagrams of the A/D converter units 0 and 1, respectively.
22.1
• 10-bit resolution
• Eight or four input channels (total eight input channels for the two units)
• Conversion time:
• Two kinds of operating modes
• Eight data registers for the A/D converter unit 0 and four data registers for unit 1 (total eight
• Sample and hold functionality
• Three types of conversion start
• Function of starting units simultaneously
• Interrupt source
• Module stop state specifiable
Notes: 1. Only supported in the A/D converter unit 0.
Four channels x two units (for unit 0 and unit 1)
Eight channels x one unit (for unit 0)
⎯ Single mode: Single-channel A/D conversion
⎯ Scan mode: Continuous A/D conversion on 1 to 4 channels, or 1 to 8 channels*
data registers for the two units)
Results of A/D conversion are held in a 16-bit data register for each channel.
Conversion can be started by software, a conversion start trigger by the 16-bit timer pulse unit
(TPU)*
A/D conversion for multiple units can be started by external trigger (ADTRG0).
A/D conversion end interrupt (ADI) request can be generated.
2. For unit 0, A/D conversion can be started by a conversion start trigger by the TMR
Features
1
units 0 and 1, whereas for unit 1, A/D conversion can be started by a conversion start
trigger by the TMR units 2 and 3.
or 8-bit timer (TMR)*
2.7 μs per channel (in peripheral clock mode)
1.0 μs per channel (in system clock mode*
Section 22 A/D Converter
2
, or an external trigger signal.
Rev. 2.00 Oct. 21, 2009 Page 1061 of 1454
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Section 22 A/D Converter
REJ09B0498-0200
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