R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 267

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2)
In externally extended mode, all of area 1 is external address space. In on-chip ROM enabled
extended mode, the space excluding on-chip ROM is external address space.
When area 1 external address space is accessed, the CS1 signal can be output.
Either of the basic bus interface, byte control SRAM, or burst ROM interface can be selected for
area 1 by bit BSRM1 in BROMCR and bit BCSEL1 in SRAMCR. Table 9.8 shows the external
interface of area 1.
Table 9.8
(3)
In externally extended mode, all of area 2 is external address space.
When area 2 external address space is accessed, the CS2 signal can be output.
Either the basic bus interface, byte-control SRAM interface, DRAM interface, or SDRAM
interface can be selected for area 2 by the DRAME and DTYPE bits in DRAMCR and bit
BCSEL2 in SRAMCR. Table 9.9 shows the external interface of area 2.
Table 9.9
Interface
Basic bus interface
Byte control SRAM interface
Burst ROM interface
Setting prohibited
Interface
Basic bus interface
Byte-control SRAM interface
DRAM interface
SDRAM interface
Setting prohibited
Area 1
Area 2
Area 1 External Interface
Area 2 External Interface
BSRM1 of BROMCR
0
0
1
1
DRAME in
DRAMCR
0
0
1
1
1
DTYPE
in DRAMCR
Don't care
0
1
Don't care
Don't care
Register Setting
Register Setting
Rev. 2.00 Oct. 21, 2009 Page 233 of 1454
BCSEL1 of SRAMCR
0
1
0
1
Section 9 Bus Controller (BSC)
BCSEL2 in
SRAMCR
0
1
0
0
1
REJ09B0498-0200

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