R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 827

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• Sample Setup Procedure for PPG1
TPU1 setup
PPG1 setup
TPU1 setup
Figure 15.6 Setup Procedure for Normal Pulse Output (PPG1)
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Select output trigger
Enable pulse output
Normal PPG output
Compare match?
Set TGRA value
Set next pulse
Set next pulse
Start counter
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
Section 15 Programmable Pulse Generator (PPG)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] At each TGIA interrupt, set the next
Set TIOR in TPU1 to make TGRA an
output compare register (toggle output).
Set the PPG output trigger cycle.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1 and
CCLR0.
Enable the TGIA interrupt in TIER. The
DTC or DMAC can also be set up to
transfer data to NDR.
Set the initial output values in PODR.
Set the bits in NDER for the pins to be
used for pulse output to 1.
Select the TPU compare match event to
be used as the output trigger in PCR.
Set the next pulse output values in NDR.
Set the CST bit in TSTR to 1 to start the
TCNT counter.
output values in NDR.
Rev. 2.00 Oct. 21, 2009 Page 793 of 1454
REJ09B0498-0200