R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 33

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

28.9
28.10 Sleep Instruction Exception Handling ............................................................................ 1289
28.11 φ Clock Output Control................................................................................................... 1292
28.12 Usage Notes .................................................................................................................... 1293
Section 29 List of Registers .............................................................................1295
29.1
29.2
29.3
Section 30 Electrical Characteristics ...............................................................1367
30.1
30.2
30.3
30.4
30.5
30.6
30.7
30.8
28.8.5
28.8.6
28.8.7
Hardware Standby Mode ................................................................................................ 1287
28.9.1
28.9.2
28.9.3
28.9.4
28.12.1 I/O Port Status................................................................................................. 1293
28.12.2 Current Consumption during Oscillation Settling Standby Period ................. 1293
28.12.3 Module Stop State of EXDMAC, DMAC, or DTC ........................................ 1293
28.12.4 On-Chip Peripheral Module Interrupts ........................................................... 1293
28.12.5 Writing to MSTPCRA, MSTPCRB, and MSTPCRC ..................................... 1293
28.12.6 Control of Input Buffers by DIRQnE (n = 3 to 0)........................................... 1294
28.12.7 Conflict between a transition to deep standby mode and interrupts................ 1294
28.12.8 Bφ/SDRAMφ Output State ............................................................................. 1294
Register Addresses (Address Order)............................................................................... 1296
Register Bits.................................................................................................................... 1315
Register States in Each Operating Mode ........................................................................ 1347
Absolute Maximum Ratings ........................................................................................... 1367
DC Characteristics (H8SX/1665 Group) ........................................................................ 1368
DC Characteristics (H8SX/1665M Group)..................................................................... 1371
AC Characteristics .......................................................................................................... 1374
30.4.1
30.4.2
30.4.3
30.4.4
30.4.5
USB Characteristics ........................................................................................................ 1421
A/D Conversion Characteristics ..................................................................................... 1423
D/A Conversion Characteristics ..................................................................................... 1425
Flash Memory Characteristics ........................................................................................ 1426
Setting Oscillation Settling Time after Exit from Deep Software Standby
Mode ............................................................................................................... 1280
Deep Software Standby Mode Application Example ..................................... 1281
Flowchart of Deep Software Standby Mode Operation .................................. 1285
Transition to Hardware Standby Mode ........................................................... 1287
Clearing Hardware Standby Mode.................................................................. 1287
Hardware Standby Mode Timing.................................................................... 1287
Timing Sequence at Power-On ....................................................................... 1288
Clock Timing .................................................................................................. 1374
Control Signal Timing .................................................................................... 1378
Bus Timing ..................................................................................................... 1379
DMAC and EXDMAC Timing....................................................................... 1410
Timing of On-Chip Peripheral Modules ......................................................... 1414
Rev. 2.00 Oct. 21, 2009 Page xxxi of xxxii