R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1075

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.3.6
SAR is sets the slave address. In slave mode, if the upper 7 bits of SAR match the upper 7 bits of
the first frame received after a start condition, the LSI operates as the slave device.
Bit
0
Bit
7 to 1
0
Bit
Bit Name
Initial Value
R/W
Slave Address Register (SAR)
Bit Name
ADZ
Bit Name
SVA6 to
SVA0
⎯
SVA6
R/W
7
0
Initial
Value
0
Initial
Value
0
0
SVA5
R/W
6
0
R/W
R/W
R/W
R/W
R/W
SVA4
R/W
5
0
Description
General Call Address Recognition Flag
This bit is valid in slave receive mode.
[Setting condition]
•
[Clearing condition]
•
Description
Slave Address 6 to 0
These bits set a unique address differing from the
addresses of other slave devices connected to the I
bus.
Reserved
Although this bit is readable/writable, only 0 should be
written to.
SVA3
When the general call address is detected in slave
receive mode
When 0 is written to this bit after reading ADZ = 1
R/W
4
0
SVA2
R/W
3
0
Rev. 2.00 Oct. 21, 2009 Page 1041 of 1454
Section 21 I
SVA1
R/W
2
0
2
C Bus Interface 2 (IIC2)
SVA0
R/W
1
0
REJ09B0498-0200
R/W
⎯
0
0
2
C