R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1114

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 A/D Converter
22.4
The A/D converter has two operating modes: single mode and scan mode. First select the clock for
A/D conversion (ADCLK). When changing the operating mode or analog input channel, to
prevent incorrect operation, first clear the ADST bit in ADCSR to 0. The ADST bit can be set to 1
at the same time as the operating mode or analog input channel is changed.
22.4.1
In single mode, A/D conversion is to be performed only once on the analog input of the specified
single channel.
1. A/D conversion for the selected channel is started when the ADST bit in ADCSR is set to 1 by
2. When A/D conversion is completed, the A/D conversion result is transferred to the
3. When A/D conversion is completed, the ADF bit in ADCSR is set to 1. If the ADIE bit is set
4. The ADST bit remains at 1 during A/D conversion, and is automatically cleared to 0 when
Notes: 1. Only possible in unit 0.
Rev. 2.00 Oct. 21, 2009 Page 1080 of 1454
REJ09B0498-0200
software, TPU*
corresponding A/D data register of the channel.
to 1 at this time, an ADI interrupt request is generated.
A/D conversion ends. The A/D converter enters wait state. If the ADST bit is cleared to 0
during A/D conversion, A/D conversion stops and the A/D converter enters a wait state.
2. As conversion start trigger, units 0 and 1 of TMR, and units 2 and 3 of TMR are
Operation
Single Mode
available in unit 0, and unit 1, respectively.
1
, TMR*
2
, or an external trigger input.