R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1216

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 25 Flash Memory
25.11
It is possible to switch between the user MAT and user boot MAT. However, the following
procedure is required because the start addresses of these MATs are allocated to the same address.
Switching to the user boot MAT disables programming and erasing. Programming of the user boot
MAT should take place in boot mode or programmer mode.
1. Memory MAT switching by FMATS should always be executed from the on-chip RAM.
2. When accessing the memory MAT immediately after switching the memory MATs by
3. If an interrupt request has occurred during memory MAT switching, there is no guarantee of
4. After the memory MATs have been switched, take care because the interrupt vector table will
5. The size of the user MAT is different from that of the user boot MAT. Addresses which exceed
Rev. 2.00 Oct. 21, 2009 Page 1182 of 1454
REJ09B0498-0200
FMATS from the on-chip RAM, similarly execute the NOP instruction in the on-chip RAM
for eight times (this prevents access to the flash memory during memory MAT switching).
which memory MAT is accessed. Always mask the maskable interrupts before switching
memory MATs. In addition, configure the system so that NMI interrupts do not occur during
memory MAT switching.
also have been switched. If interrupt processing is to be the same before and after memory
MAT switching, transfer the interrupt processing routines to the on-chip RAM and specify
VBR to place the interrupt vector table in the on-chip RAM.
the size of the 16-Kbyte user boot MAT should not be accessed. If an attempt is made, data is
read as an undefined value.
<User MAT>
Switching between User MAT and User Boot MAT
Figure 25.22 Switching between User MAT and User Boot MAT
Procedure for switching to the user boot MAT
1.
2.
3.
Procedure for switching to the user MAT
1.
2.
3.
Inhibit interrupts (mask).
Write H'AA to FMATS.
Before access to the user boot MAT, execute the NOP instruction for eight times.
Inhibit interrupts (mask).
Write other than H'AA to FMATS.
Before access to the user MAT, execute the NOP instruction for eight times.
<On-chip RAM>
Procedure for
switching to
user boot MAT
Procedure for
switching to
user MAT
<User boot MAT>

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