R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1014

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 USB Function Module (USB)
20.3.19 Data Status Register (DASTS)
DASTS indicates whether the transmit FIFO buffers contain valid data. A bit is set when data is
written to the corresponding FIFO buffer and the packet enable state is set, and cleared when all
data has been transmitted to the host.
Rev. 2.00 Oct. 21, 2009 Page 980 of 1454
REJ09B0498-0200
Bit
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
⎯
⎯
EP3 DE
EP2 DE
⎯
⎯
⎯
EP0i DE
⎯
R
7
0
Initial
Value
0
0
0
0
0
0
0
0
⎯
R
6
0
EP3 DE
R/W
R
R
R
R
R
R
R
R
R
5
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
EP3 Data Present
This bit is set when the endpoint 3 FIFO buffer
contains valid data.
EP2 Data Present
This bit is set when the endpoint 2 FIFO buffer
contains valid data.
Reserved
These bits are always read as 0.
EP0i Data Present
This bit is set when the endpoint 0 FIFO buffer
contains valid data.
EP2 DE
R
4
0
⎯
R
3
0
⎯
R
2
0
⎯
R
1
0
EP0i DE
R
0
0