R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1298

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 28 Power-Down Modes
28.2.8
DPSIEGR selects the rising or falling edge to clear deep software standby mode.
DPSIEGR is not initialized by the internal reset signal upon exit from deep software standby
mode.
Rev. 2.00 Oct. 21, 2009 Page 1264 of 1454
REJ09B0498-0200
Bit
7
6 to 4
3
2
1
Bit
Bit name
Initial value:
R/W:
Bit Name
DNMIEG
⎯
DIRQ3EG 0
DIRQ2EG 0
DIRQ1EG 0
Deep Standby Interrupt Edge Register (DPSIEGR)
DNMIEG
R/W
7
0
Initial
Value
0
All 0
R/W
⎯
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
5
0
Module
NMI Edge Select
Selects the active edge for NMI pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
Reserved
These bits are always read as 0. The write value should
always be 0.
IRQ3 Interrupt Edge Select
Selects the active edge for IRQ3-A pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
IRQ2 Interrupt Edge Select
Selects the active edge for IRQ2-A pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
IRQ1 Interrupt Edge Select
Selects the active edge for IRQ1-A pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
R/W
⎯
4
0
DIRQ3EG
R/W
3
0
DIRQ2EG
R/W
2
0
DIRQ1EG
R/W
1
0
DIRQ0EG
R/W
0
0