R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 55

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
1.4.3
Table 1.5
Classification Pin Name
Power supply
Clock
Operating
mode control
System control
Pin Functions
Pin Functions
V
V
V
PLLV
PLLV
DrV
DrV
XTAL
EXTAL
OSC1
OSC2
SDRAMφ
MD3 to MD0
MD_CLK
RES
STBY
EMLE
CC
CL
SS
CC
SS
CC
SS
I/O
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Input
Input
Input
Input
Input
Input pin for the on-chip emulator enable signal. The signal
Description
Power supply pins. Connect them to the system power
supply.
Connect this pin to V
should be placed close to the pin).
Ground pins. Connect them to the system power supply
(0 V).
Power supply pin for the PLL circuit. Connect them to the
system power supply.
Ground pin for the PLL circuit.
Power supply pin for the on-chip USB transceiver. Connect
this pin to the system power supply.
Ground pin for the on-chip USB transceiver.
Pins for a crystal resonator. An external clock signal can be
input through the EXTAL pin. For an example of this
connection, see section 27, Clock Pulse Generator.
The 32.768 KH crystal resonator is connected to this pin.
The 32.768 KH crystal resonator is connected to this pin.
Outputs the system clock for external devices.
When connecting the synchronous DRAM, connect it to the
CLK pin of synchronous DRAM. For details, see section 9,
Bus Controller (BSC).
Pins for setting the operating mode. The signal levels on
these pins must not be changed during operation.
This pin changes the multiplication ratio of the clock
oscillator. Do not change values on this pin during operation.
Reset signal input pin. This LSI enters the reset state when
this signal goes low.
This LSI enters hardware standby mode when this signal
goes low.
level should normally be fixed low.
Rev. 2.00 Oct. 21, 2009 Page 21 of 1454
SS
via a 0.1-μF capacitor (The capacitor
Section 1 Overview
REJ09B0498-0200

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