R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 373

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(5)
With DKC = 1 or EDKC = 1, the DACK and EDACK signals are asserted a half cycle earlier
compared to the case when DKC = 0 or EDKC = 0.
In fast-page access, the DACK signal continues to be low. In this case, bus cycles can be
distinguished by the BS output timing.
Figure 9.89 shows an output timing example of the DACK and EDACK signals when DKC = 1 or
EDKC = 1, and DDS = 1 or EDDS = 1. Figure 9.90 shows an output timing example of the DACK
and EDACK signals when DKC = 1 or EDKC = 1, and DDS = 0 or EDDS = 0.
Figure 9.89 Output Timing Example of DACK and EDACK when DKC = 1 or EDKC = 1
When DKC = 1
DACK or EDACK
Precharge-sel
Address bus
D15 to D8
SDRAMφ
D7 to D0
DQMLU
DQMLL
RD/WR
RAS
CAS
CKE
WE
CS
BS
and DDS = 1 or EDDS = 1 (Write)
PALL
T
Row address
p
ACTV
address
Row
T
r
Column address 1
NOP
T
c1
High
WRIT
T
c2
Rev. 2.00 Oct. 21, 2009 Page 339 of 1454
Column address 2
NOP
T
c1
Section 9 Bus Controller (BSC)
WRIT
T
c2
REJ09B0498-0200

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