R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 735

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 14.15 TIORL_0
[Legend]
x:
Notes: 1. When bits TPSC2 to TPSC0 in TCR_1 are set to B'000 and Pφ/1 is used as the
Bit 7
IOD3
0
0
0
0
0
0
0
0
1
1
1
1
Don't care
2.
3.
Bit 6
IOD2
0
0
0
0
1
1
1
1
0
0
0
1
TCNT_1 count clock, this setting is invalid and input capture is not generated.
When the BFB bit in TMDR_0 is set to 1 and TGRD_0 is used as a buffer register, this
setting is invalid and input capture/output compare is not generated.
In PWM mode 1, the IOD3 to IOD0 settings control output of the TIOCC0 pin functions.
Bit 5
IOD1
0
0
1
1
0
0
1
1
0
0
1
x
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
x
x
TGRD_0
Function
Output
compare
register*
Input
capture
register*
2
2
TIOCD0 Pin Function*
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCD0 pin
Input capture at rising edge
Capture input source is TIOCD0 pin
Input capture at falling edge
Capture input source is TIOCD0 pin
Input capture at both edges
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down*
Rev. 2.00 Oct. 21, 2009 Page 701 of 1454
Section 14 16-Bit Timer Pulse Unit (TPU)
Description
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REJ09B0498-0200
1