R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1109

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit Bit Name
3
2
1
[Legend]
x:
Notes: 1. To set A/D conversion to start by the ADTRG pin, the DDR bit and ICR bit for the
CKS1
CKS1
ADSTCLR 0
2. Access to the full-spec emulator (E6000H) is prohibited but the on-chip emulator (E10A-
3. Cycles of Pφ
4. Set the number of "states" (clock cycles) for sampling to 25 (ADSSTR_1 = D'25).
5. When Pφ = Iφ, Iφ/4, or Iφ/8, settings of the form 11xx are prohibited.
Don't care
corresponding pin should be set to 0 and 1, respectively. For details, see section 13, I/O
Ports.
USB) is usable.
Initial
Value R/W Description
0
0
R/W
R/W
R/W A/D Start Clear
Clock Select 1 and 0
In conjunction with the EXCKS bit in ADCSR and the ICKSEL*
ADMOSEL, these bits set the A/D conversion time.
Make settings for the A/D conversion time while the ADST bit in
ADCSR is 0, and then set the mode of A/D conversion. Furthermore,
for transitions to software standby mode and module-stop mode, set
these bits to b'11 beforehand.
EXCKS*
0000: A/D conversion time = 528 states*
0001: A/D conversion time = 268 states*
0010: A/D conversion time = 138 states*
0011: A/D conversion time = 73 states*
01xx: Prohibited setting
1000: A/D conversion time = 336 states*
1001: A/D conversion time = 172 states*
1010: A/D conversion time = 90 states*
1011: A/D conversion time = 49 states*
11xx: A/D conversion time = 34 states*
Enables or disables automatic clearing of the ADST bit in scan mode.
0: The ADST bit is not automatically cleared to 0 in scan mode.
1: The ADST bit is cleared to 0 upon completion of A/D conversion for
all of the selected channels in scan mode.
This setting applies when Pφ = Iφ/2*
2
, ICKSEL, CKS1, CKS0
Rev. 2.00 Oct. 21, 2009 Page 1075 of 1454
3
3
3
3
*
3
3
3
(max.)
3
3
(max.)
(max.)
4
(max.)
(max.)
(max.)
(max.)
(max.)
5
(max.)
.
Section 22 A/D Converter
REJ09B0498-0200
2
bit in