R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1263

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
26.6
1. In serial transfer, data are input or output in LSB order (see figure 26.3).
2. If a pin with open-drain function is SAMPLEed while its open-drain function is enabled and
3. Pins of the boundary scan (TCK, TDI, TMS, and TRST) have to be pulled up by pull-up
4. Power supply pins (Vcc, Vc
5. Clock pins (EXTAL and XTAL) cannot be boundary-scanned.
6. Reset and standby signals (RES and STBY) cannot be boundary-scanned.
7. Boundary scan pins (TCK, TMS, TRST, TDI, and TDO) cannot be boundary-scanned.
8. The boundary scan function is not available when this LSI is in the following states.
(1) Reset state
(2) Hardware standby mode, software standby mode, and deep software standby mode
while the corresponding OUT register is set to 1, the corresponding Control register is cleared
to 0 (the pin status is Hi-Z). If the pin is SAMPLEed while the corresponding OUT register is
cleared to 0, the corresponding Control register is 1 (the pin status is 0)
resistors.
cannot be boundary-scanned.
Usage Notes
Notes: Serial data output from JTIR to TDO is not possible.
From TDI pin
register
To TDO pin
Shift
Figure 26.3 Serial Data Input/Output
Serial data input from TDI to JTIDR is not possible.
L
, Vss, AVcc, AVss, Vref, PLLVcc, PLLVss, DrVcc, and DrVss)
.
.
.
JTIR and JTIDR
.
.
.
Rev. 2.00 Oct. 21, 2009 Page 1229 of 1454
Bit 31
Bit 30
Bit 1
Bit 0
input/output
in LSB order
Serial data
Section 26 Boundary Scan
REJ09B0498-0200

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