R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1296

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 28 Power-Down Modes
28.2.7
DPSIFR is used to request an exit from deep software standby mode. When the interrupt specified
in DPSIEGR is generated, the applicable bit in DPSIFR is set to 1. The bit is set to 1 even when an
interrupt is generated in the modes other than deep software standby. Therefore, a transition to
deep software standby should be made after this register bits are cleared to 0.
DPSIFR is not initialized by the internal reset signal upon exit from deep software standby mode.
Rev. 2.00 Oct. 21, 2009 Page 1262 of 1454
REJ09B0498-0200
Bit
7
6
5
Bit
Bit name
Initial value:
R/W:
Notes: 1. Only 0 can be written to clear the flag.
2. Supported only by the H8SX/1665M Group.
Bit Name
DNMIF
DUSBIF
DT32KIF
Deep Standby Interrupt Flag Register (DPSIFR)
R/(W)*
DNMIF
7
0
1
Initial
Value
0
0
0
DUSBIF
R/(W)*
6
0
1
R/W
R/(W)*
R/(W)*
R/(W)*
DT32KIF
R/(W)*
1
1
1
5
0
Module
NMI Flag
[Setting condition]
NMI input specified in DPSIEGR is generated.
[Clearing condition]
Writing a 0 to this bit after reading it as 1.
USB Suspend/Resume Interrupt Flag
[Setting condition]
When the USB suspend/resume interrupt occurs.
[Clearing condition]
Writing a 0 to this bit after reading it as 1.
32K Timer Interrupt Flag
[Setting condition]
When the 32K timer interrupt occurs.
[Clearing condition]
Writing a 0 to this bit after reading it as 1.
1
DLVDIF*
R/(W)*
4
0
1
2
DIRQ3F
R/(W)*
3
0
1
DIRQ2F
R/(W)*
2
0
1
DIRQ1F
R/(W)*
1
0
1
DIRQ0F
R/(W)*
0
0
1

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