R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 228

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Bus Controller (BSC)
9.2.6
IDLCR specifies the idle cycle insertion conditions and the number of idle cycles.
Rev. 2.00 Oct. 21, 2009 Page 194 of 1454
REJ09B0498-0200
Bit
15
14
13
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
IDLS3
IDLS2
IDLS1
Idle Control Register (IDLCR)
IDLSEL7
IDLS3
R/W
R/W
15
1
7
0
Initial
Value
1
1
1
IDLSEL6
IDLS2
R/W
R/W
14
1
6
0
R/W
R/W
R/W
R/W
IDLSEL5
IDLS1
R/W
R/W
13
1
5
0
Description
Idle Cycle Insertion 3
Inserts an idle cycle between the bus cycles when the
DMAC or EXDMAC single address transfer (write cycle)
is followed by external access.
0: No idle cycle is inserted
1: An idle cycle is inserted
Idle Cycle Insertion 2
Inserts an idle cycle between the bus cycles when the
external write cycle is followed by external read cycle.
0: No idle cycle is inserted
1: An idle cycle is inserted
Idle Cycle Insertion 1
Inserts an idle cycle between the bus cycles when the
external read cycles of different areas continue.
0: No idle cycle is inserted
1: An idle cycle is inserted
IDLSEL4
IDLS0
R/W
R/W
12
1
4
0
IDLSEL3
IDLCB1
R/W
R/W
11
1
3
0
IDLSEL2
IDLCB0
R/W
R/W
10
1
2
0
IDLSEL1
IDLCA1
R/W
R/W
9
1
1
0
IDLSEL0
IDLCA0
R/W
R/W
8
1
0
0