R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 726

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 16-Bit Timer Pulse Unit (TPU)
Table 14.4 CCLR2 to CCLR0 (Channels 0 and 3)
Notes: 1. Synchronous operation is selected by setting the SYNC bit in TSYR to 1.
Table 14.5 CCLR2 to CCLR0 (Channels 1, 2, 4, and 5)
Notes: 1. Synchronous operation is selected by setting the SYNC bit in TSYR to 1.
Rev. 2.00 Oct. 21, 2009 Page 692 of 1454
REJ09B0498-0200
Channel
0, 3
Channel
1, 2, 4, 5
2. When TGRC or TGRD is used as a buffer register, TCNT is not cleared because the
2. Bit 7 is reserved in channels 1, 2, 4, and 5. It is always read as 0 and cannot be
buffer register setting has priority, and compare match/input capture does not occur.
modified.
Bit 7
CCLR2
0
0
0
0
1
1
1
1
Bit 7
Reserved*
0
0
0
0
2
Bit 6
CCLR1
0
0
1
1
0
0
1
1
Bit 6
CCLR1
0
0
1
1
Bit 5
CCLR0
0
1
0
1
0
1
0
1
Bit 5
CCLR0
0
1
0
1
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare match/input
capture*
TCNT cleared by TGRD compare match/input
capture*
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
2
2
1
1
1