R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 337

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.11.2
A Row address and a column address are multiplexed in the SDRAM space. Select the number of
row address bits to be shifted with bits MXC1 and MXC0 in DRAMCR. The precharge set
command (Precharge-sel) is output on the upper column address. Table 9.25 lists the relationship
among bits MXC1 and MXC0 and shifted bit number.
Table 9.25 Relationship Among MXC1 and MXC0 and Shifted Bit Count
9.11.3
Either 8 or 16 bits can be selected as the data bus width of the SDRAM space by bits ABWH2 and
ABWL2 in ABWCR. SDRAM with 16-bit words can be connected directly to 16-bit bus width
space.
D7 to D0 are valid in 8-bit SDRAM space and D15 to D0 are valid in 16-bit SDRAM space.
The data endian format can be selected by bit LE2 in ENDIANCR. For details on the access size
and alignment, see section 9.5.6, Endian and Data Alignment.
Note:
MXC1
DRAMCR
0
0
1
1
* When issuing the PALL command, precharge-sel = 1 is output and when issuing the ACTIV command, a corresponding address is output.
MXC0
0
1
0
1
Shift Bit
Count
8 bits
9 bits
10 bits 8 bits
11 bits 8 bits
Address Multiplexing
Data Bus
Data Bus
Width
8 bits
16 bits
8 bits
16 bits
16 bits
16 bits
Address
Row address
Column address
Row address
Column address
Row address
Column address
Row address
Column address
Row address
Column address
Row address
Column address
Row address
Column address
Row address
Column address
A23 to A18 A17 A16 A15 A14 A13 A12 A11 A10
A23 to A18
A23 to A18
A23 to A18
A23 to A18
A23 to A18 A17
A23 to A18 A17
A23 to A18 A17
A23 to A18 A17
A23 to A18
A23 to A18
A23 to A18
A23 to A18
A23 to A18 A17
A23 to A18 A17
A23 to A18 A17
A23 to A18 A17
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
A23 A22 A21 A20 A19
A23 A22 A21 A20 A19
A23 A22 A21 A20
A23 A22 A21 A20
-
-
-
-
-
-
-
-
-
-
-
-
A23 A22 A21 A20 P/A19* A18 A17 A16 A15 A14 A13 A12 A11 A10
A23 A22 A21 A20
A23 A22 A21
A23 A22 A21
-
-
-
-
-
-
-
-
A23 A22 A21
A23 A22 A21
A23 A22
A23 A22
-
-
-
-
External Address Pin
A23 A22
A23 A10
A23
A11
P/A19*
P/A20*
P/A21*
P/A22*
P
P
P
P
P/A18*
P/A20*
P/A21*
Rev. 2.00 Oct. 21, 2009 Page 303 of 1454
A18 A17 A16 A15 A14 A13 A12 A11 A10
A10
A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A10
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A10
A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
A10
P
P
P
P
A17 A16 A15 A14 A13 A12 A11 A10
A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
A9
A9
A9
A9
A9
A9
A9
A9
A9
A8
A8
A8
A8
A8
A8
A8
A8
A8
Section 9 Bus Controller (BSC)
A7
A7
A7
A7
A7
A7
A7
A7
A7
A6
A6
A6
A6
A6
A6
A6
A6
A6
A5
A5
A5
A5
A5
A5
A5
A5
A5
A4
A4
A4
A4
A4
A4
A4
A4
A4
REJ09B0498-0200
A3
A3
A3
A3
A3
A3
A3
A3
A3
A2
A2
A2
A2
A2
A2
A2
A2
A2
A1
A9
A1
A9
A1
A1
A1
A1
A1
A1
A1
A0
A0
A0
A8
A0
A8
A0
A9
A0
A9
A0
A0
A0