R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 989

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.11.2 Register Descriptions
The CRC operation circuit has the following registers.
• CRC control register (CRCCR)
• CRC data input register (CRCDIR)
• CRC data output register (CRCDOR)
(1)
CRCCR initializes the CRC operation circuit, switches the operation mode, and selects the
generating polynomial.
Bit
7
6 to 3
2
Bit
Bit Name
Initial Value
R/W
CRC Control Register (CRCCR)
Bit Name
DORCLR
—
LMS
DORCLR
W
7
0
Initial
Value
0
All 0
0
⎯
R
6
0
R/W
W
R
R/W
⎯
R
5
0
Description
CRCDOR Clear
Setting this bit to 1 clears CRCDOR to H'0000.
Reserved
The initial value should not be changed.
CRC Operation Switch
Selects CRC code generation for LSB-first or MSB-first
communication.
0: Performs CRC operation for LSB-first
1: Performs CRC operation for MSB-first
Section 19 Serial Communication Interface (SCI, IrDA, CRC)
communication. The lower byte (bits 7 to 0) is first
transmitted when CRCDOR contents (CRC code)
are divided into two bytes to be transmitted in two
parts.
communication. The upper byte (bits 15 to 8) is first
transmitted when CRCDOR contents (CRC code)
are divided into two bytes to be transmitted in two
parts.
⎯
R
4
0
⎯
R
3
0
Rev. 2.00 Oct. 21, 2009 Page 955 of 1454
LMS
R/W
2
0
R/W
G1
1
0
REJ09B0498-0200
R/W
G0
0
0