R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1477

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 Overview
1.1 Features
1.1.2 Overview of
Functions
Table 1.1 Overview of
Functions
Section 7 Interrupt
Controller
7.5 Interrupt Exception
Handling Vector Table
Table 7.2 Interrupt
Sources, Vector Address
Offsets, and Interrupt
Priority
Section 13 I/O Ports
13.1 Register
Descriptions
Table 13.2 Register
Configuration in Each
Port
Item
Page Revision (See Manual for Details)
7
145
601
Amended
Amended
Notes added
Notes: 1. Bits 2 and 3 are valid and the other bits are reserved
Classification
32K timer
Classifi
cation
⎯
LVD*
TM32K
2
Interrupt
Source
Reserved for
system use
Voltage-
monitoring
interrupt
(IRQ14)
32KOVI
(IRQ15)
2. Do not access when PCJKE = 1.
3. Do not access when PCJKE = 0.
4. The lower six bits are valid and the upper two bits
5. The lower five bits are valid and the upper three bits
for port C registers. The write value should be the
same as the initial value.
are reserved for port 6 registers. The write value
should be the same as the initial value.
are reserved for port M registers. The write value
should be the same as the initial value.
Module/
Function
32K timer
(TM32K)
Vector
Number
76
77
78
79
Vector Address
Offset*
Advanced
Mode, Middle
Mode,
Maximum Mode IPR
H'0130
H'0134
H'0138
H'013C
Description
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Rev. 2.00 Oct. 21, 2009 Page 1443 of 1454
1
Eight counter clocks which divides the
32.768 kHz clock can be selected
8 bits × 1 channel or 24 bits × 1 channel can
be selected
Interrupts can be generated when the
counter overflows.
Eight overflow cycles selectable (250 msec,
500 msec, 1 sec, 2 sec, 30 sec, 60 sec,
about 23 days, and about 46 days)
⎯
IPRD6 to
IPRD4
IPRD2 to
IPRD0
Priority
High
Low
DTC
Activation
⎯
⎯
⎯
⎯
REJ09B0498-0200
DMAC
Activation
⎯
⎯
⎯
⎯