R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1339

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
DMA transfer count register_3
DMA block size register_3
DMA mode control register_3
DMA address control register_3
EXDMA source address register_0
EXDMA destination address register_0
EXDMA offset register_0
EXDMA transfer count register_0
EXDMA block size register_0
EXDMA mode control regisrer_0
EXDMA address control register_0
EXDMA source address register_1
EXDMA destination address register_1
EXDMA offset register_1
EXDMA transfer count register_1
EXDMA block size register_1
EXDMA mode control register_1
EXDMA address control register_1
EXDMA source address register_2
EXDMA destination address register_2
EXDMA offset register_2
EXDMA transfer count register_2
EXDMA block size register_2
EXDMA mode control register_2
EXDMA address control register_2
EXDMA source address register_3
EXDMA destination address register_3
EXDMA offset register_3
EXDMA transfer count register_3
EXDMA block size register_3
EXDMA mode control register_3
Abbreviation
DTCR_3
DBSR_3
DMDR_3
DACR_3
EDSAR_0
EDDAR_0
EDOFR_0
EDTCR_0
EDBSR_0
EDMDR_0
EDACR_0
EDSAR_1
EDDAR_1
EDOFR_1
EDTCR_1
EDBSR_1
EDMDR_1
EDACR_1
EDSAR_2
EDDAR_2
EDOFR_2
EDTCR_2
EDBSR_2
EDMDR_2
EDACR_2
EDSAR_3
EDDAR_3
EDOFR_3
EDTCR_3
EDBSR_3
EDMDR_3
Number
of Bits
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Address
H'FFC6C
H'FFC70
H'FFC74
H'FFC78
H'FFC80
H'FFC84
H'FFC88
H'FFC8C
H'FFC90
H'FFC98
H'FFCA0
H'FFCA4
H'FFCA8
H'FFCAC
H'FFCB0
H'FFCB8
H'FFCC0
H'FFCC4
H'FFCC8
H'FFCD0
H'FFCD8
H'FFCE0
H'FFCE4
H'FFCE8
H'FFCEC
H'FFCF0
H'FFC94
H'FFCB4
H'FFCCC
H'FFCD4
H'FFCF4
Rev. 2.00 Oct. 21, 2009 Page 1305 of 1454
Module
DMAC_3
DMAC_3
DMAC_3
DMAC_3
EXDMAC_0
EXDMAC_0
EXDMAC_0
EXDMAC_0
EXDMAC_0
EXDMAC_0
EXDMAC_0
EXDMAC_1
EXDMAC_1
EXDMAC_1
EXDMAC_1
EXDMAC_1
EXDMAC_1
EXDMAC_1
EXDMAC_2
EXDMAC_2
EXDMAC_2
EXDMAC_2
EXDMAC_2
EXDMAC_2
EXDMAC_2
EXDMAC_3
EXDMAC_3
EXDMAC_3
EXDMAC_3
EXDMAC_3
EXDMAC_3
Section 29 List of Registers
Data
Width
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
REJ09B0498-0200
Access
Cycles
(Read/Write)
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ
2Iφ/2Iφ