R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1305

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 28 Power-Down Modes
28.6
All-Module-Clock-Stop Mode
When the ACSE bit is set to 1 and all modules controlled by MSTPCRA and MSTPCRB are
stopped (MSTPCRA, MSTPCRB = H'FFFFFFFF), or all modules except for the 8-bit timer (units
0 and 1) are stopped (MSTPCRA, MSTPCRB = H'F[C to F]FFFFFF), executing a SLEEP
instruction with the SSBY bit in SBYCR cleared to 0 will cause all modules (except for the 8-bit
1
2
2
timer*
, watchdog timer, 32K timer, power-on reset circuit*
, and voltage detection circuit*
), the
bus controller, and the I/O ports to stop operating, and to make a transition to all-module-clock-
stop mode at the end of the bus cycle.
When power consumption should be reduced ever more in all-module-clock-stop mode, stop
modules controlled by MSTPCRC (MSTPCRC[15:8] = H'FFFF).
All-module-clock-stop mode is cleared by an external interrupt (NMI or IRQ0 to IRQ11 pins),
RES pin input, or an internal interrupt (8-bit timer*
1
, watchdog timer, 32K timer, or voltage-
2
detection circuit*
), and the CPU returns to the normal program execution state via the exception
handling state. All-module-clock-stop mode is not cleared if interrupts are disabled, if interrupts
other than NMI are masked on the CPU side, or if the relevant interrupt is designated as a DTC
activation source.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Notes: 1. Operation or halting of the 8-bit timer can be selected by bits MSTPA9 and MSTPA8
in MSTPCRA.
2. Supported only by the H8SX/1665M Group.
Rev. 2.00 Oct. 21, 2009 Page 1271 of 1454
REJ09B0498-0200