R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 28

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.4
20.5
20.6
20.7
20.8
20.9
20.10 Usage Notes .................................................................................................................... 1024
Section 21 I
21.1
21.2
21.3
Rev. 2.00 Oct. 21, 2009 Page xxvi of xxxii
20.3.26 Transceiver Test Register 0 (TRNTREG0) ...................................................... 992
20.3.27 Transceiver Test Register 1 (TRNTREG1) ...................................................... 994
Interrupt Sources............................................................................................................... 996
Operation .......................................................................................................................... 998
20.5.1
20.5.2
20.5.3
20.5.4
20.5.5
20.5.6
20.5.7
Processing of USB Standard Commands and Class/Vendor Commands ....................... 1016
20.6.1
Stall Operations .............................................................................................................. 1017
20.7.1
20.7.2
20.7.3
DMA Transfer ................................................................................................................ 1020
20.8.1
20.8.2
20.8.3
Example of USB External Circuitry ............................................................................... 1022
20.10.1 Receiving Setup Data...................................................................................... 1024
20.10.2 Clearing the FIFO ........................................................................................... 1024
20.10.3 Overreading and Overwriting the Data Registers ........................................... 1024
20.10.4 Assigning Interrupt Sources to EP0................................................................ 1025
20.10.5 Clearing the FIFO When DMA Transfer is Enabled ...................................... 1025
20.10.6 Notes on TR Interrupt ..................................................................................... 1025
20.10.7 Restrictions on Peripheral Module Clock (Pφ) Operating Frequency............. 1026
20.10.8 Notes on Deep Software Standby Mode when USB is Used.......................... 1026
Features........................................................................................................................... 1027
Input/Output Pins............................................................................................................ 1029
Register Descriptions...................................................................................................... 1030
21.3.1
21.3.2
21.3.3
21.3.4
2
C Bus Interface 2 (IIC2).............................................................. 1027
Cable Connection.............................................................................................. 998
Cable Disconnection ......................................................................................... 999
Suspend and Resume Operations...................................................................... 999
Control Transfer.............................................................................................. 1007
EP1 Bulk-Out Transfer (Dual FIFOs)............................................................. 1013
EP2 Bulk-In Transfer (Dual FIFOs) ............................................................... 1014
EP3 Interrupt-In Transfer................................................................................ 1015
Processing of Commands Transmitted by Control Transfer........................... 1016
Overview ........................................................................................................ 1017
Forcible Stall by Application .......................................................................... 1017
Automatic Stall by USB Function Module ..................................................... 1019
Overview ........................................................................................................ 1020
DMA Transfer for Endpoint 1 ........................................................................ 1020
DMA Transfer for Endpoint 2 ........................................................................ 1021
I
I
I
I
2
2
2
2
C Bus Control Register A (ICCRA) ............................................................. 1031
C Bus Control Register B (ICCRB) ............................................................. 1032
C Bus Mode Register (ICMR)...................................................................... 1034
C Bus Interrupt Enable Register (ICIER)..................................................... 1035