R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 201

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The user break controller (UBC) generates a UBC break interrupt request each time the state of
the program counter matches a specified break condition. The UBC break interrupt is a non-
maskable interrupt and is always accepted, regardless of the interrupt control mode and the state of
the interrupt mask bit of the CPU.
For each channel, the break control register (BRCR) and break address register (BAR) are used to
specify the break condition as a combination of address bits and type of bus cycle.
Four break conditions are independently specifiable on four channels, A to D.
8.1
• Number of break channels: four (channels A, B, C, and D)
• Break comparison conditions (each channel)
• UBC break interrupt exception handling is executed immediately before execution of the
• Module stop state can be set
⎯ Address
⎯ Bus master (CPU cycle)
⎯ Bus cycle (instruction execution (PC break))
instruction fetched from the specified address (PC break).
Features
Section 8 User Break Controller (UBC)
Rev. 2.00 Oct. 21, 2009 Page 167 of 1454
Section 8 User Break Controller (UBC)
REJ09B0498-0200