R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 238

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Bus Controller (BSC)
9.2.13
DRAMCR specifies the DRAM/SDRAM interface. Rewrite this register while the
DRAM/SDRAM is not accessed.
Rev. 2.00 Oct. 21, 2009 Page 204 of 1454
REJ09B0498-0200
Bit
15
14
13, 12
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
DRAM Control Register (DRAMCR)
Bit Name
DRAME
DTYPE
⎯
DRAME
R/W
R/W
BE
15
0
7
0
Initial
Value
0
0
All 0
DTYPE
RCDM
R/W
R/W
14
0
6
0
R/W
R/W
R/W
R
DDS
R/W
13
⎯
R
0
5
0
Description
Area 2 DRAM Interface Select
Selects whether or not area 2 is specified as the
DRAM/SDRAM interface. When this bit is set to 1,
select the type of DRAM to be used in area 2 with the
DTYPE bit. When this bit is set to 1, the BCSEL2 bit in
SRAMCR should be set to 0.
0: Basic bus interface or byte-control SRAM interface
1: DRAM/SDRAM interface
DRAM Select
Selects the type of DRAM to be used in area 2.
0: DRAM is used in area 2
1: SDRAM is used in area 2
Reserved
The initial value should not be changed.
EDDS
R/W
12
⎯
R
0
4
0
OEE
R/W
11
⎯
R
0
3
0
RAST
R/W
R/W
10
⎯
0
2
0
MXC1
R/W
⎯
R
9
0
1
0
MXC0
CAST
R/W
R/W
8
0
0
0