R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 801

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.10.11 Conflict between Overflow/Underflow and Counter Clearing
If overflow/underflow and counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is
not set and TCNT clearing takes precedence.
Figure 14.54 shows the operation timing when a TGR compare match is specified as the clearing
source, and H'FFFF is set in TGR.
14.10.12 Conflict between TCNT Write and Overflow/Underflow
If an overflow/underflow occurs due to increment/decrement in the T2 state of a TCNT write
cycle, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is not set.
Figure 14.55 shows the operation timing when there is conflict between TCNT write and
overflow.
Figure 14.54 Conflict between Overflow and Counter Clearing
Pφ
TCNT input
clock
TCNT
Counter clear
signal
TGF flag
TCFV flag
Figure 14.55 Conflict between TCNT Write and Overflow
Pφ
Address
Write
TCNT
TCFV flag
H'FFFF
Disabled
H'FFFF
TGR write cycle
T
TCNT address
1
T
2
H'0000
Rev. 2.00 Oct. 21, 2009 Page 767 of 1454
Section 14 16-Bit Timer Pulse Unit (TPU)
M
TCNT write data
REJ09B0498-0200