R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 127

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note that some registers are not initialized by any of the resets. The following describes the CPU
internal registers.
The PC, one of the CPU internal registers, is initialized by loading the start address from vector
addresses with the reset exception handling. At this time, the T bit in EXR is cleared to 0 and the I
bits in EXR and CCR are set to 1. The general registers, MAC, and other bits in CCR are not
initialized.
The initial value of the SP (ER7) is undefined. The SP should be initialized using the MOV.L
instruction immediately after a reset. For details, see section 2, CPU. For other registers that are
not initialized by a reset, see register descriptions in each section.
When a reset is canceled, the reset exception handling is started. For the reset exception handling,
see section 6.3, Reset.
4.2
Table 4.2 shows the pin related to resets.
Table 4.2
Pin Name
Reset
Input/Output Pin
Pin Configuration
RES
Symbol
I/O
Input
Rev. 2.00 Oct. 21, 2009 Page 93 of 1454
Function
Reset input
REJ09B0498-0200
Section 4 Resets