R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1043

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is in-
transfer, one packet of data to be sent to the host is written to the FIFO. If there is more data to be
sent, this data is written to the FIFO after the data written first has been sent to the host (EP0iTS
bit in IFR0 = 1).
The end of the data stage is identified when the host transmits an OUT token and the status stage
is entered.
Note: If the size of the data transmitted by the function is smaller than the data size requested by
Data Stage (Control-In)
the host, the function indicates the end of the data stage by returning to the host a packet
shorter than the maximum packet size. If the size of the data transmitted by the function is
an integral multiple of the maximum packet size, the function indicates the end of the data
stage by transmitting a zero-length packet.
Data transmission to host
Set EP0i transmission
(IFR0.EP0i TS = 1)
IN token reception
Figure 20.13 Data Stage (Control-In) Operation
in EP0i FIFO?
to TRG.EP0s
complete flag
USB function
Valid data
1 written
RDFN?
Yes
Yes
ACK
NACK
NACK
No
No
Interrupt
request
Rev. 2.00 Oct. 21, 2009 Page 1009 of 1454
Clear EP0i transmission
data register (EPDR0i)
data register (EPDR0i)
Write 1 to EP0i packet
Write 1 to EP0i packet
(TRG.EP0i PKTE = 1)
(TRG.EP0i PKTE = 1)
Section 20 USB Function Module (USB)
(IFR0.EP0i TS = 0)
Write data to EP0i
Write data to EP0i
From setup stage
complete flag
Application
enable bit
enable bit
REJ09B0498-0200