R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 23

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 Programmable Pulse Generator (PPG) ............................................769
15.1
15.2
15.3
15.4
15.5
Section 16 8-Bit Timers (TMR).........................................................................805
16.1
16.2
16.3
14.10.6 Conflict between TGR Write and Compare Match........................................... 763
14.10.7 Conflict between Buffer Register Write and Compare Match .......................... 764
14.10.8 Conflict between TGR Read and Input Capture ............................................... 764
14.10.9 Conflict between TGR Write and Input Capture .............................................. 765
14.10.10 Conflict between Buffer Register Write and Input Capture.............................. 766
14.10.11 Conflict between Overflow/Underflow and Counter Clearing ......................... 767
14.10.12 Conflict between TCNT Write and Overflow/Underflow ................................ 767
14.10.13 Multiplexing of I/O Pins ................................................................................... 768
14.10.14 PPG1 Setting when TPU1 Pin is Used.............................................................. 768
14.10.15 Interrupts in the Module Stop State .................................................................. 768
Features............................................................................................................................. 769
Input/Output Pins.............................................................................................................. 772
Register Descriptions........................................................................................................ 774
15.3.1
15.3.2
15.3.3
15.3.4
15.3.5
Operation .......................................................................................................................... 791
15.4.1
15.4.2
15.4.3
15.4.4
15.4.5
15.4.6
15.4.7
15.4.8
Usage Notes ...................................................................................................................... 803
15.5.1
15.5.2
15.5.3
Features............................................................................................................................. 805
Input/Output Pins.............................................................................................................. 810
Register Descriptions........................................................................................................ 811
16.3.1
Example of Non-Overlapping Pulse Output
(Example of 4-Phase Complementary Non-Overlapping Pulse Output)........... 799
Next Data Enable Registers H, L (NDERH, NDERL) ..................................... 775
Output Data Registers H, L (PODRH, PODRL)............................................... 778
Next Data Registers H, L (NDRH, NDRL) ...................................................... 780
PPG Output Control Register (PCR) ................................................................ 785
PPG Output Mode Register (PMR) .................................................................. 787
Output Timing................................................................................................... 791
Sample Setup Procedure for Normal Pulse Output........................................... 792
Example of Normal Pulse Output (Example of 5-Phase Pulse Output)............ 794
Non-Overlapping Pulse Output......................................................................... 795
Sample Setup Procedure for Non-Overlapping Pulse Output ........................... 797
Inverted Pulse Output ....................................................................................... 801
Pulse Output Triggered by Input Capture ......................................................... 802
Module Stop State Function.............................................................................. 803
Operation of Pulse Output Pins......................................................................... 803
TPU Setting when PPG1 is in Use.................................................................... 803
Timer Counter (TCNT)..................................................................................... 813
Rev. 2.00 Oct. 21, 2009 Page xxi of xxxii