R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 795

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.10
14.10.1 Module Stop Function Setting
Operation of the TPU can be disabled or enabled using the module stop control register. The initial
setting is for operation of the TPU to be halted. Register access is enabled by clearing module stop
state. For details, see section 28, Power-Down Modes.
14.10.2 Input Clock Restrictions
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 14.46 shows the input clock
conditions in phase counting mode.
Figure 14.46 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Usage Notes
Note: Phase difference, Overlap ≥ 1.5 states
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Pulse width ≥ 2.5 states
Overlap
Pulse width
difference
Phase
Overlap
difference
Phase
Pulse width
Pulse width
Rev. 2.00 Oct. 21, 2009 Page 761 of 1454
Section 14 16-Bit Timer Pulse Unit (TPU)
Pulse width
REJ09B0498-0200