R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 15

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 User Break Controller (UBC) ............................................................167
8.1
8.2
8.3
8.4
8.5
Section 9 Bus Controller (BSC).........................................................................179
9.1
9.2
9.3
9.4
9.5
Features............................................................................................................................. 167
Block Diagram.................................................................................................................. 168
Register Descriptions........................................................................................................ 169
8.3.1
8.3.2
8.3.3
Operation .......................................................................................................................... 174
8.4.1
8.4.2
8.4.3
Usage Notes ...................................................................................................................... 176
Features............................................................................................................................. 179
Register Descriptions........................................................................................................ 182
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
9.2.10
9.2.11
9.2.12
9.2.13
9.2.14
9.2.15
9.2.16
9.2.17
9.2.18
Bus Configuration............................................................................................................. 216
Multi-Clock Function and Number of Access Cycles ...................................................... 217
External Bus...................................................................................................................... 221
9.5.1
9.5.2
Break Address Register n (BARA, BARB, BARC, BARD) ............................ 170
Break Address Mask Register n (BAMRA, BAMRB, BAMRC, BAMRD) .... 171
Break Control Register n (BRCRA, BRCRB, BRCRC, BRCRD) ................... 172
Setting of Break Control Conditions................................................................. 174
PC Break........................................................................................................... 174
Condition Match Flag ....................................................................................... 175
Bus Width Control Register (ABWCR)............................................................ 183
Access State Control Register (ASTCR) .......................................................... 184
Wait Control Registers A and B (WTCRA, WTCRB) ..................................... 185
Read Strobe Timing Control Register (RDNCR) ............................................. 190
CS Assertion Period Control Registers (CSACR) ............................................ 191
Idle Control Register (IDLCR) ......................................................................... 194
Bus Control Register 1 (BCR1) ........................................................................ 196
Bus Control Register 2 (BCR2) ........................................................................ 198
Endian Control Register (ENDIANCR)............................................................ 199
SRAM Mode Control Register (SRAMCR) ..................................................... 200
Burst ROM Interface Control Register (BROMCR)......................................... 201
Address/Data Multiplexed I/O Control Register (MPXCR) ............................. 203
DRAM Control Register (DRAMCR) .............................................................. 204
DRAM Access Control Register (DRACCR)................................................... 209
Synchronous DRAM Control Register (SDCR) ............................................... 210
Refresh Control Register (REFCR) .................................................................. 211
Refresh Timer Counter (RTCNT)..................................................................... 215
Refresh Time Constant Register (RTCOR) ...................................................... 215
Input/Output Pins.............................................................................................. 221
Area Division.................................................................................................... 225
Rev. 2.00 Oct. 21, 2009 Page xiii of xxxii