R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1262

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 26 Boundary Scan
CLAMP (Instruction Code: B'0010): When the CLAMP instruction is selected, output pins
output the boundary scan register value which was specified by the SAMPLE/PRELOAD
instruction in advance. While the CLAMP instruction is selected, the status of boundary scan
register is maintained regardless of the TAP controller state. BYPASS is connected between TDI
and TDO, the same operation as BYPASS instruction can be achieved.
This instruction connects the bypass register (JTBPR) between the TDI and TDO pins, leading to
the same operation as when BYPASS mode has been selected.
HIGHZ (Instruction Code: B'0011): When the HIGHZ instruction is selected, all output pins
enter high-impedance state. While the HIGHZ instruction is selected, the status of boundary scan
register is maintained regardless of the state of the TAP controller.
BYPASS is connected between TDI and TDO pins, leading to the same operation as when the
BYPASS instruction has been selected.
Rev. 2.00 Oct. 21, 2009 Page 1228 of 1454
REJ09B0498-0200

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