R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 32

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
27.5
27.6
Section 28 Power-Down Modes...................................................................... 1245
28.1
28.2
28.3
28.4
28.5
28.6
28.7
28.8
Rev. 2.00 Oct. 21, 2009 Page xxx of xxxii
Subclock Oscillator......................................................................................................... 1239
27.5.1
27.5.2
Usage Notes .................................................................................................................... 1241
27.6.1
27.6.2
27.6.3
Features........................................................................................................................... 1245
Register Descriptions...................................................................................................... 1249
28.2.1
28.2.2
28.2.3
28.2.4
28.2.5
28.2.6
28.2.7
28.2.8
28.2.9
28.2.10 Deep Standby Backup Register (DPSBKRn) ................................................. 1267
Multi-Clock Function ..................................................................................................... 1268
28.3.1
28.3.2
Module Stop State........................................................................................................... 1269
Sleep Mode ..................................................................................................................... 1270
28.5.1
28.5.2
All-Module-Clock-Stop Mode........................................................................................ 1271
Software Standby Mode.................................................................................................. 1272
28.7.1
28.7.2
28.7.3
28.7.4
Deep Software Standby Mode ........................................................................................ 1276
28.8.1
28.8.2
28.8.3
28.8.4
Setting Oscillation Settling Time after Exit from Software Standby
Mode ............................................................................................................... 1274
Connecting 32.768 kHz Crystal Resonator..................................................... 1239
Handling of Pins when the Subclock is Not to be Used.................................. 1240
Notes on Clock Pulse Generator ..................................................................... 1241
Notes on Resonator......................................................................................... 1242
Notes on Board Design ................................................................................... 1242
Standby Control Register (SBYCR) ............................................................... 1250
Module Stop Control Registers A and B (MSTPCRA and MSTPCRB) ........ 1252
Module Stop Control Register C (MSTPCRC)............................................... 1255
Deep Standby Control Register (DPSBYCR)................................................. 1256
Deep Standby Wait Control Register (DPSWCR).......................................... 1258
Deep Standby Interrupt Enable Register (DPSIER) ....................................... 1260
Deep Standby Interrupt Flag Register (DPSIFR)............................................ 1262
Deep Standby Interrupt Edge Register (DPSIEGR) ....................................... 1264
Reset Status Register (RSTSR)....................................................................... 1265
Switching of Main Clock Frequencies............................................................ 1268
Switching to Subclock .................................................................................... 1268
Entry to Sleep Mode ....................................................................................... 1270
Exit from Sleep Mode..................................................................................... 1270
Entry to Software Standby Mode.................................................................... 1272
Exit from Software Standby Mode ................................................................. 1272
Software Standby Mode Application Example............................................... 1275
Entry to Deep Software Standby Mode .......................................................... 1276
Exit from Deep Software Standby Mode........................................................ 1277
Pin State on Exit from Deep Software Standby Mode.................................... 1278
Bφ/SDRAMφ Operation after Exit from Deep Software Standby Mode........ 1279

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