R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 142

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Voltage Detection Circuit (LVD)
5.3.3
If the LVDE and LVDRI bits in LVDCR and the DLVDIE bit in DPSIER have all been set to 1
during a period in deep software standby mode, the voltage-detection circuit requests release from
deep software standby mode when Vcc falls to or below Vdet. This sets the DLVDIF bit in
DPSIFR to 1, thus producing release from the deep software standby mode. For the deep software
standby mode, see section 28, Power-Down Modes.
5.3.4
The result of voltage detection by the voltage-detection circuit can be monitored by checking the
value of the LVDMON bit in LVDCR. When the LVDMON bit has been enabled by setting the
LVDE bit, 0 indicates that Vcc is at or below Vdet and 1 indicates that Vcc is above Vdet. This
bit should be read while the voltage-monitoring reset has been disabled by setting the LVDRI bit
to 1.
Before clearing the LVDF bit in RSTSR to 0, confirm that the LVDMON bit is set to 1 (indicating
that Vcc is above Vdet). When it is impossible to clear the LVDF bit despite the LVDMON bit
being 1, the voltage-detection circuit is in the state of waiting for stabilization. In such cases, clear
the bit again after the stabilization time (t
Rev. 2.00 Oct. 21, 2009 Page 108 of 1454
REJ09B0498-0200
Release from Deep Software Standby Mode by the Voltage-Detection Circuit
Voltage Monitor
por
) has elapsed.

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