R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 343

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.11.7
When the time between the ACTV command and the subsequent READ or WRIT command does
not meet a given specification, the Trw cycle in which the NOP command is output can be
inserted for one to three cycles between the Tr cycle in which the ACTV command is output and
the Tc1 cycle in which the column address is output. Set the bit according to the SDRAM to be
used and the frequency of this LSI so that the number of wait cycles can be optimal.
Figures 9.63 and 9.64 show a timing example when the one Trw cycle is inserted.
Figure 9.63 Read Timing Example of Row Address Output Retained for 1 Clock Cycle
Controlling Row Address Output Cycle
Precharge-sel
Address bus
D15 to D8
SDRAMφ
D7 to D0
DQMLU
DQMLL
RD/WR
RAS
CAS
CKE
WE
(RCD1 = 0, RCD0 = 1, CAS Latency = 2)
CS
BS
PALL
T
p
Row address
ACTV
T
address
r
Row
NOP
T
rw
READ
High
T
c1
Column address
Rev. 2.00 Oct. 21, 2009 Page 309 of 1454
T
cl
NOP
Section 9 Bus Controller (BSC)
T
c2
REJ09B0498-0200