R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 304

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Bus Controller (BSC)
9.9.6
An extension cycle (Tmaw) can be inserted between Tma1 and Tma2 cycles to extend the AH
signal output period by setting the ADDEX bit in MPXCR. By inserting the Tmaw cycle, the
address setup for AH and the AH minimum pulse width can be assured.
Figure 9.33 shows the access timing when the address cycle is three cycles.
Rev. 2.00 Oct. 21, 2009 Page 270 of 1454
REJ09B0498-0200
Read
Write
DACK or EDACK
Address Cycle Control
Address bus
CSn
AH
RD
D15 to D0
LHWR
LLWR
D15 to D0
BS
RD/WR
Figure 9.33 Access Timing of 3 Address Cycles (ADDEX = 1)
Note: n = 3 to 7
T
ma1
Address cycle
Address
T
Address
maw
T
ma2
T
1
Data cycle
Write data
Read data
T
2

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