R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1042

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 20 USB Function Module (USB)
(1)
Rev. 2.00 Oct. 21, 2009 Page 1008 of 1454
REJ09B0498-0200
Setup Stage
Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
SETUP token reception
reception complete flag
2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
(IFR0.SETUP TS = 1)
Set setup command
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
Yes
USB function
Figure 20.12 Setup Stage Operation
No
processing by
Interrupt request
this module
Automatic
Clear EP0o FIFO (FCLR.EP0oCLR = 1)
Clear EP0i FIFO (FCLR.EP0iCLR = 1)
To control-in
Write 1 to EP0s read complete bit
Determine data stage direction*
data stage
Read 8-byte data from EP0s
Decode command data
(TRG.EP0s RDFN = 1)
(IFR0.SETUP TS = 0)
Clear SETUP TS flag
Application
*
2
To control-out
data stage
1