R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 636

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 13 I/O Ports
13.1.1
DDR is an 8-bit write-only register that specifies the port input or output for each bit. A read from
the DDR is invalid and DDR is always read as an undefined value.
When the general I/O port function is selected, the corresponding pin functions as an output port
by setting the corresponding DDR bit to 1; the corresponding pin functions as an input port by
clearing the corresponding DDR bit to 0.
The initial DDR values are shown in table 13.3.
Table 13.3 Startup Mode and Initial Value
Rev. 2.00 Oct. 21, 2009 Page 602 of 1454
REJ09B0498-0200
Port
Port A
Other ports
Bit
Bit Name
Initial Value
R/W
Notes: The lower six bits are valid and the upper two bits are reserved for port 6 registers.
The lower five bits are valid and the upper three bits are reserved for port M registers.
Bits 2 and 3 are valid and the other bits are reserved for port C registers.
Registers of ports J and K cannot be accessed when PCJKE = 0.
Registers of ports D and E cannot be accessed when PCJKE = 1.
Data Direction Register (PnDDR) (n = 1, 2, 3, 6, A to F, H to K, and M)
Pn7DDR
W
7
0
Pn6DDR
W
6
0
H'80
H'00
External Extended Mode
Pn5DDR
W
5
0
Pn4DDR
W
4
0
Pn3DDR
W
3
0
Startup Mode
Pn2DDR
Single-Chip Mode
H'00
H'00
W
2
0
Pn1DDR
W
1
0
Pn0DDR
W
0
0

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