R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 1247

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
12. A programming/erasing program for the flash memory used in a conventional F-ZTAT H8,
13. Unlike a conventional F-ZTAT H8 or H8S microcomputers, measures against a program crash
14. When downloading the programming/erasing program, do not clear the SCO bit in FCCS to 0
15. The contents of general registers ER0 and ER1 are not saved during download of an on-chip
H8S microcomputer which does not support download of the on-chip program by setting the
SCO bit in FCCS to 1 cannot run in this LSI. Be sure to download the on-chip program to
execute programming/erasure of the flash memory in this F-ZTAT H8SX microcomputer.
are not taken by WDT while programming/erasing and downloading a programming/erasing
program. When needed, measures should be taken by user. A periodic interrupt generated by
the WDT can be used as the measures, as an example. In this case, the interrupt generation
period should take into consideration time to program/erase the flash memory.
immediately after setting it to 1. Otherwise, download cannot be performed normally.
Immediately after executing the instruction to set the SCO bit to 1, dummy read of the FCCS
must be executed twice.
program, initialization, programming, or erasure. When needed, save the general registers
before a download request or before execution of initialization, programming, or erasure using
the procedure program.
Rev. 2.00 Oct. 21, 2009 Page 1213 of 1454
Section 25 Flash Memory
REJ09B0498-0200

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