R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 31

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

25.8
25.9
25.10 Flash Memory Emulation Using RAM........................................................................... 1179
25.11 Switching between User MAT and User Boot MAT...................................................... 1182
25.12 Programmer Mode .......................................................................................................... 1183
25.13 Standard Serial Communications Interface Specifications for Boot Mode..................... 1183
25.14 Usage Notes .................................................................................................................... 1212
Section 26 Boundary Scan ...............................................................................1215
26.1
26.2
26.3
26.4
26.5
26.6
Section 27 Clock Pulse Generator ...................................................................1231
27.1
27.2
27.3
27.4
25.7.3
On-Board Programming Mode ....................................................................................... 1147
25.8.1
25.8.2
25.8.3
25.8.4
25.8.5
Protection........................................................................................................................ 1176
25.9.1
25.9.2
25.9.3
Features........................................................................................................................... 1215
Block Diagram of Boundary Scan Function ................................................................... 1216
Input/Output Pins............................................................................................................ 1216
Register Descriptions...................................................................................................... 1217
26.4.1
26.4.2
26.4.3
26.4.4
Operations....................................................................................................................... 1226
26.5.1
26.5.2
Usage Notes .................................................................................................................... 1229
Register Description ....................................................................................................... 1233
27.1.1
27.1.2
Oscillator......................................................................................................................... 1237
27.2.1
27.2.2
PLL Circuit ..................................................................................................................... 1239
Frequency Divider .......................................................................................................... 1239
RAM Emulation Register (RAMER).............................................................. 1146
Boot Mode ...................................................................................................... 1148
USB Boot Mode.............................................................................................. 1152
User Program Mode........................................................................................ 1156
User Boot Mode.............................................................................................. 1166
On-Chip Program and Storable Area for Program Data ................................. 1170
Hardware Protection ....................................................................................... 1176
Software Protection......................................................................................... 1177
Error Protection............................................................................................... 1177
Instruction Register (JTIR) ............................................................................. 1218
Bypass Register (JTBPR) ............................................................................... 1219
Boundary Scan Register (JTBSR)................................................................... 1219
IDCODE Register (JTID) ............................................................................... 1225
TAP Controller ............................................................................................... 1226
Commands ...................................................................................................... 1227
System Clock Control Register (SCKCR) ...................................................... 1233
Subclock Control Register (SUBCKCR) ........................................................ 1235
Connecting Crystal Resonator ........................................................................ 1237
External Clock Input ....................................................................................... 1238
Rev. 2.00 Oct. 21, 2009 Page xxix of xxxii