R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 484

• Manufacturer Part Number: R5F61665N50FPV
• Description: MCU FLASH 512K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61665N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 EXDMA Controller (EXDMAC)
• Selection of extended repeat area function (to transfer data such as ring buffer data by fixing
• Selection of address update methods: Increment/decrement by 1, 2 or 4, fixed, or offset
• Transfer of word or longword data to addresses beyond each data boundary
• Two kinds of interrupts requested to the CPU
• Acceptance of a transfer request can be reported to an external device via the EDRAK pin
• Operation of EXDMAC, connected to a dedicated bus, in parallel with a bus master such as the
• Module stop state can be set.
Rev. 2.00 Oct. 21, 2009 Page 450 of 1454
REJ09B0498-0200
Cluster transfer mode: One cluster data is transferred at a single transfer request
the upper bit value in the transfer address register and repeating the address values in a
specified range)
For the extended repeat area, 1 bit (2 bytes) to 27 bits (128 Mbytes) can be set independently
for the transfer source or destination.
addition
When offset addition is used to update addresses, the mid-addresses can be skipped during data
transfer.
Data can be divided into an optimal data size (byte or word) according to addresses when
transferring data.
Transfer end interrupt: Requested after the number of data set by the transfer counter has been
completely transferred
Transfer escape end interrupt: Requested when the remaining transfer size is smaller than the
size set for a single transfer request, after a repeat-size transfer is completed, or when an
extended repeat area overflow occurs.
(only for the EXDMAC).
CPU, DTC, or DMAC (only for the EXDMAC).
Up to 32-byte data can be set as cluster size