R5F61665N50FPV Renesas Electronics America, R5F61665N50FPV Datasheet - Page 139

MCU FLASH 512K ROM 144-LQFP

R5F61665N50FPV

Manufacturer Part Number
R5F61665N50FPV
Description
MCU FLASH 512K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61665N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61665N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.3
5.3.1
Figure 5.2 shows the timing of a voltage monitoring reset by the voltage-detection circuit.
When Vcc falls below Vdet in the state where the LVDE bit in LVDCR has been set to 1 and the
LVDRI bit has been cleared to 0, the LVDF bit is set to 1 and the voltage-detection circuit
generates a voltage monitoring reset.
Next, after Vcc has risen above Vdet, release from the voltage-monitoring reset takes place after a
period for stabilization (t
by the voltage detection circuit in order to stabilize the Vcc and the internal circuit of the LSI.
When a voltage-monitoring reset is generated, the LVDF bit is set to 1.
For details, see section 30, Electrical Characteristics.
Voltage Detection Circuit
Voltage Monitoring Reset
Vcc
LVDE
LVDRI
Internal
reset signal
(Low)
Figure 5.2 Timing of the Voltage-Monitoring Reset
por
) has elapsed. The period for stabilization (t
↓Write 0
↓Write 1
Vdet
Vpor
Rev. 2.00 Oct. 21, 2009 Page 105 of 1454
Section 5 Voltage Detection Circuit (LVD)
Stabilization time (t
por
) is a time that is generated
POR
)
REJ09B0498-0200

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